Efficient, Secure and Intelligent Computing (ESIC) Laboratory

Research Interest:

• Energy Efficient and High Performance In-Memory Computing Circuit, Architecture, and Algorithm Cross-Layer Software & Hardware Co-Design, with applications in AI, Deep Neural Network, Data Encryption, Graph Processing, Bioinformatics, etc. [link]
• Machine Learning Circuit and System with Algorithm and Hardware Co-Design [link]
• Efficient Deep Neural Network Accelerator Circuit and Architecture [link]
• Adversarial Artificial Intelligence (AI) Security and Trustworthy AI System [link]
• Brain-inspired (Neuromorphic) and Boolean Computing Using Emerging Nanoscale Devices like Spintronics, ReRAM and Memristors [link]
• Nano-scale Physics Based Spintronic Device (GMR/ TMR Vertical Spin Valve, Magnetic Skyrmion, Lateral Spin Valve, Magnetic Domain Wall Strip, Spin-Torque Oscillator, Spin-Orbit Torque ) Modeling and Simulations [link]
• Low Power Digital VLSI Circuit Design [link]

Multiple Research Assistant Positions Available :

we welcome all levels of students to apply (undergraduate/ master/ PhD students). please send your CV to [email protected] if interested

This year’s major recruiting area is VLSI circuit and chip design for In-memory computing, AI accelerator, on-device learning, etc. Another major area is efficient on-device learning algorithm co-design. Multiple positions in those areas. please reach out to me if you are interested.

Academic Awards of Dr. Fan:

• National Science Foundation Faculty Early Career Development (CAREER) Award, 2022
• Best IP Paper Award in Design, Automation and Test in Europe (DATE), 2022
• Best Paper Award in 29th ACM Great Lakes Symposium on VLSI, 2019
• Best Paper Award in IEEE Computer Society Annual Symposium on VLSI, 2018
• Best Paper Award in IEEE Computer Society Annual Symposium on VLSI, 2017
• Best Poster Award (1^st place), ACM SIGDA & IEEE CEDA PhD Forum at Design Automation Conference (DAC), 2018
• Best Paper Candidate in Asia and South Pacific Design Automation Conference (ASP-DAC), 2019
• Best Paper Candidate in International Symposium on Quality Electronic Design (ISQED), 2019
• Best Reviewer of IEEE Circuits and Systems Magazine, 2022
• Top 5% Faculty at the Ira A. Fulton Schools of Engineering, ASU, 2022
• Top 5% Teaching Award, Fulton Schools of Engineering, ASU, 2022
• Outstanding Faculty Mentor Award Nomination of ASU Graduate College, 2021/2022
• ASU SUN Award, 2022
• Schloss Dagstuhl – NSF Support Award for Junior Researchers, 2019
• Front Cover Paper in IEEE Transactions on Magnetics, Vol. 54, No.2, Feb. 2018
• Front Cover Paper in IEEE Transactions on Magnetics, Vol. 51, No.10, Oct. 2015

Academic Activities and Services:

Dr. Fan has authored 170+ peer-reviewed international journal/conference research papers. He is the receipt of National Science Foundation Career Award, best paper award of 2019 ACM Great Lakes Symposium on VLSI, 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), and 2017 IEEE ISVLSI, best IP paper award of 2022 Design Automation and Test in Europe (DATE). His research works were also nominated as best paper candidate 2021 Design Automation Conference (DAC), 2019 Asia and South Pacific Design Automation Conference (ASPDAC) and 2019 International Symposium on Quality Electronic Design (ISQED). He is also the TPC Co-Chair of ISQED 2023, co-chair of iMACAW@DAC 2022/2023, technical area chair of DAC 2021, GLSVLSI 2019-2022, ISQED 2019-2022, and the financial chair of ISVLSI 2019. He served as technical reviewers for over 30+ international journals/conferences, such as Nature Electronics, IEEE TNNLS, TVLSI, TCAD, TNANO, TC, TCAS, etc. He also served as the Technical Program Committee member of DAC, ICCAD, HPCA, MICRO, WACV, GLSVLSI, ISVLSI, ASP-DAC, etc.